China's Chip Strategy: Bypassing EUV Limits at a Rising Price

Chinese chipmakers are successfully producing advanced silicon without EUV machines, though the workaround significantly inflates production costs. Export restrictions have prevented ASML from selling its extreme ultraviolet lithography tools to China. This forces local firms to rely on older deep ultraviolet equipment. By exposing critical layers multiple times, these manufacturers can still create capable chips. Experts note that this approach creates more defects and extends production timelines.

EUV technology has long been the primary bottleneck in China's quest for cutting-edge components. ASML is the sole producer of these systems, which use 13.5nm wavelength light to print fine processor features. Analysts estimate the gap between Chinese and Western capabilities is five years or more. Despite this, Chinese firms have made unexpected strides. A 2023 teardown of the Huawei Mate 60 Pro revealed its Kirin 9000S processor was built by SMIC using a 7nm-class process without EUV. Recent analysis suggests SMIC has moved its DUV process closer to 5nm density levels, though it still lags behind TSMC and Samsung.

The technique involves multiple patterning, where designs are split into simpler patterns built up step by step. Chris Mack, co-founder and CTO of Fractilia, explains that the trade-offs are often ignored. Industry wisdom suggests three exposures on a 193 immersion tool cost as much as one EUV pass. At four masks, EUV becomes the more economical choice. Quality is also a concern because each new pattern must align precisely with previous etching. More exposures lead to accumulated errors and process variation. Designers may add space to compensate, but this enlarges the chip and reduces dies per wafer. Mack notes, "You don't sell wafers, you sell die."

Memory production highlights the efficiency gap. A June Morgan Stanley report estimated that CXMT produces only one-third as many bits per wafer as Western rivals. The bank called lithography access a hard ceiling for Chinese memory development. Mack cautions that node labels like 5nm or 3nm have limited meaning on their own. SMIC's N+3 process represents progress but remains less scaled than established 5nm processes from Samsung and TSMC.

DUV technology still has potential. Micron developed its 1-alpha DRAM without EUV using tight process control. Mack stated that Micron pushed 193nm technology farther than any other memory maker. Morgan Stanley believes CXMT's move to 1-alpha DRAM for HBM3e is achievable without EUV. Douglas Fuller of Copenhagen Business School expects advanced packaging to allow DUV use for latest DRAM generations by the end of the decade. Mack adds that China could make significant progress with a full 193 immersion ecosystem, though memory is easier than logic.

Even Micron eventually adopted EUV for its 1-gamma DRAM, which offers over 30% greater bit density than the previous generation. EUV has its own drawbacks, including stochastic effects that require higher exposure doses. Mack says he would be hard pressed to believe a 3nm or 2nm node is economically viable without EUV. Chinese chipmakers will not stall, however. They can continue pushing DUV while accepting larger dies, poorer yields, or longer times. Morgan Stanley projects CXMT will increase its global DRAM bit supply share from 14% in 2026 to 16% in 2028 through new capacity. The bank also expects China's AI chip self-sufficiency to rise from 42% in 2025 to 70% by 2030, though gaps in EUV, HBM, and advanced software will persist.